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NOIL1SM0300A
Programmable Gain
The amplification inside the PGA is controlled by three
SPI settings:
The PGA gain selection: 16 gain steps are selectable by
means of the GAIN_PGA<3:0> register. Selection word
0000 corresponds with gain 1.32 and selection word 1111
range of the ADC can be used. In this example, Vcal is set
at 1.75V (the maximum input range of the ADC) to make
sure the spread on the black level is still inside the range of
the ADC after amplification. The result after amplification
is the purple histogram.
corresponds with gain 15.5. Table 6 gives the 16 gain
settings.
The unity gain selection of the PGA is done by the
UNITY_PGA setting. If this bit is high, the GAIN_PGA
settings are ignored.
The SEL_UNI setting is used to have more gain steps. If
this bit is low, the signal is divided by two before entering the
PGA. GAIN_PGA and UNITY_PGA settings are applied
afterwards. If the SEL_UNI bit is high, there is a unity feed
through to the PGA. This allows having a total gain range of
0.5 to 16 in 32 steps.
The amplification in the PGA is done around a pivoting
point, set by Vcal as illustrated in Figure 8. The VCAL<7:0>
setting is used to apply the Vcal voltage through an on chip
DAC
Vcal
Table 6. GAIN SETTINGS
GAIN_PGA<3.0>
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Gain
1.32
1.56
1.85
2.18
2.58
3.05
3.59
4.22
4.9
5.84
6.84
8.02
9.38
11.2
13.12
15.38
0.75V
1.45V
1.65V
1.75V
Vcal
Volts
Figure 8. Effect on Histogram of PGA (gain = 4)
(Vcal is the green line)
Figure 9 continues on the example in the section, Offset
Regulation. The blue histogram is the histogram of the
image after the column amplifiers. With offset regulation an
offset of 200 mV is added to bring the signal in range of the
ADC. The black level of 1.45V is shifted to 1.65V.
The red and blue histograms have a swing of 100 mV. This
means the input range of the ADC is not completely used. By
amplifying the signal with a factor 10 by the PGA, the full
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8
Figure 9. Example of PGA Operation
Volts
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